This invention relates to in-circuit test systems and more particularly to an integrated pin driver for an in-circuit test system.
Test systems for integrated circuits are classified in the industry as either "functional" or "in-circuit" test systems. A functional test system treats an entire pc board as a single test element, while an in-circuit test system treats a single component as the test element. For a functional test system, a test pattern is applied to the pc board inputs, while the pc board outputs are monitored and analyzed. To isolate a particular component with a functional test system, an appropriate test pattern must be generated so as to exercise the component. As the component may be at a location remote from the pc board input connection and may be coupled to many other components, it is difficult to engineer such test patterns for complex designs. Accordingly, functional test systems often are ineffective at isolating a component on a pc board under test.
An in-circuit test system treats a single component as the test element (e.g., device under test). A test pattern is applied directly to the component through pin drivers, while the responses are monitored through sensors. Accordingly, the test pattern directly exercises the component under test. As a result, an in-circuit test system provides a more effective testing methodology.
As the device under test (DUT) for an in-circuit test system is an IC component electrically coupled to other IC components, the DUT receives one or more inputs signals from preceding circuits and sends one or more output signals to subsequent circuits. In order to apply a test pattern to the DUT inputs, the input signals from the preceding circuits need to be overridden. Such overriding is referred to as "backdriving" the preceding circuits. As used herein, backdriving refers to sinking or sourcing sufficient current so that the DUT input is driven to the desired logic state, regardless of whether the preceding circuit output(s) are at the same or a different logic state. To drive the DUT so as to override the input signal from the preceding circuit, the pin driver applies a common high current signal to the DUT input and the preceding circuit output. Accordingly, the test system drives the DUT, while backdriving the preceding circuit(s).
FIG. 1 depicts a prior art circuit 10 including a driver 12, a first inverter 14 (e.g., preceding circuit) and a second inverter 16 (e.g., DUT). Under normal operations, the first inverter 14 drives the second inverter. When the input to the first inverter 14 is a logic high, the output to the first inverter 14 is a logic low. Thus, the input to the second inverter 16 is a logic low. If according to a test operation, the input to the second inverter 16 is desired to be a logic high while the output to the first inverter 14 is a logic low, then the low output of the first inverter must be overridden to provide a logic high input to the second inverter 16. The driver 12 thus needs to backdrive the first inverter 14 by sourcing sufficient current to raise the second inverter 16 input to a logic high.
In another case, the input to the first inverter 14 may be a logic low, causing its output to be a logic high. Thus, under normal operation, the input to the second inverter 16 is a logic high. If according to a test operation, the input to the second inverter 16 is desired to be a logic low, then the high output of the first inverter 14 must be overridden to provide a logic low input. The driver 12 thus backdrives the first inverter 14 by sinking current from the first inverter 14 so as to drive the second inverter 16 input low. Accordingly, the driver must sink or source current to control the DUT and backdrive preceding circuits.
Large backdriving currents induce large power dissipation, and thus, increased temperature. Prolonged temperature changes may damage the device under test and preceding circuits. Extreme temperature rise may cause melting of metal or semiconductor or alloys, while moderate temperature rise may shorten circuit lifetime due to thermally induced mechanical stresses. Accordingly, backdriving currents of short duration are desireable. A high test pattern rate, and thus short duration of backdriving current, has been found to avoid damaging the device under test and preceding circuits.
Various devices to be tested may have logic gates of varying technology (i.e., ECL, CMOS, bipolar). Each technology requires prescribed voltage levels to register a given logic level. Such prescribed voltage levels typically vary from technology to technology. Accordingly, an in-circuit test system able to drive test signals of differing voltage levels is needed to achieve a versatile in-circuit test system.
To test many devices in a short time, a high data rate is desireable. One parameter which impacts the data rate is the slew rate of the test signal. A fast slew rate enables the system to run at a high data rate so as to test more devices in less time. Adversely however, a fast slew rate causes more overshoot and ringing (e.g., transmission line effect). Because a test signal may travel a few feet along a cable before arriving at a DUT, such transmission line effect may become significant. Thus, the overshoot or ringing caused by a signal having a fast slew rate may result in voltage swings large enough to alter the logic level registered by a given device. Because the load impedance is not always much larger than the source impedance, a solution in which the source impedance is matched to the transmission line impedance may not be feasible. To minimize the transmission line effects at the test head, a series termination is conventionally used which dissipates the reflections. Such termination attenuates the test signal amplitude and correspondingly reduces the slew rate. Accordingly, a trade-off of the slew rate speed is desireable so as to enable a sufficiently high data rate, while also keeping the transmission line effects insignificant.
To test devices having differing input/output pin configurations, it is desirable to provide an integrated driver/sensor having a plurality of pin drivers and a plurality of sensors, each pin driver and sensor sharing a common DUT pin. Accordingly there is a need for a tri-state pin driver which has a high impedance output when a sensor is to monitor a common DUT pin. As a result, there also is a need for a pin driver which can withstand a large breakdown voltage during the high impedance mode.
FIG. 2 shows performance characteristics of conventional drivers. The listed drivers include: Schlumberger series 700 (SLB), Analog Devices 1323 (AD), Zentel 8000, Hewlett-Packard 3070 (HP), GenRad 2282, and Teradyne L210i D4 (Tera).
Conventional pin drivers include saturating current switches at the output stage. To switch between logic states at the output requires that the switch come out of saturation, then into saturation in the opposite logic state. As a result, the switching time is unnecessarily long.